The conversation about AI infrastructure bottlenecks has evolved considerably over the past 18 months. The transformer shortage, the grid interconnection queue, and the construction workforce gap have each received extensive analysis as physical constraints binding the AI buildout. The original constraint, the one that defined 2023 and 2024, has received proportionally less attention in 2026 because Blackwell hardware is now shipping at volume and because hyperscaler AI infrastructure spending is projected to exceed $600 billion this year.
That appearance is misleading. The supply constraint has not disappeared. Instead, it has migrated up the hardware generation stack from H100 to GB200 to GB300, while TSMC’s CoWoS advanced packaging capacity remains oversubscribed through at least 2026. DigiTimes reporting on TSMC CoWoS capacity constraints The infrastructure buildout that hyperscalers are committing to has not outrun the supply constraint. It has expanded fast enough that the supply constraint continues chasing it.
Why CoWoS Capacity Still Controls the Market
CoWoS, or Chip-on-Wafer-on-Substrate, is the advanced packaging technology that enables high-bandwidth memory to sit directly adjacent to GPU logic on the same substrate, providing the memory bandwidth that Blackwell’s compute throughput requires. Without CoWoS packaging, Nvidia cannot assemble the Blackwell GPU modules that data center operators need. Without HBM3e memory stacked in those modules, the assembled hardware cannot deliver the performance that frontier AI training and inference workloads require.
Nvidia has reportedly booked over 50% of TSMC’s projected CoWoS capacity for 2026, with an estimated 800,000 to 850,000 wafers reserved, ensuring that while competitors scramble for remaining slots, Nvidia maintains priority access to the packaging capacity the AI market leader requires. That reservation leaves approximately 40 to 50% of CoWoS capacity for AMD’s MI series, Intel’s Gaudi platform, Google’s TPU packaging, and every other AI accelerator that depends on the same packaging technology. The competition for that remaining capacity is intense, and the outcome determines which non-Nvidia AI hardware platforms can scale in 2026.
Why the Constraint Is Structural
The Blackwell supply constraint is not a temporary disruption that resolves when TSMC brings its next CoWoS capacity increment online. It is a structural feature of a market where demand for the most capable AI hardware consistently exceeds the supply of the specialised packaging, memory, and wafer capacity needed to produce it, and where Nvidia’s dominant market position gives it first claim on whatever supply becomes available. The infrastructure market that plans around the assumption that Blackwell constraints will ease before the next hardware generation creates its own constraints is planning on a timeline that Nvidia’s product roadmap does not support. The operators who have built their procurement strategies around perpetual supply tightness at the frontier are the ones whose infrastructure programmes will deliver on schedule.
The HBM3e Bottleneck That Defines the Memory Stack
High-bandwidth memory is the second binding constraint in the Blackwell supply chain, operating in parallel with the CoWoS packaging constraint rather than in sequence with it. Micron’s high-bandwidth memory capacity sold out through calendar year 2026, and SK Hynix and Samsung are similarly fully allocated, with HBM supply fully committed through 2026 including HBM3e. The memory allocation is not simply a matter of production volume. It is a matter of stacking yield and qualification complexity. GB200 NVL72 racks require 192 gigabytes of HBM3e per GPU.
GB300 Ultra racks increase that to 288 gigabytes per GPU. SK Hynix, which has secured primary supplier status for Nvidia’s Blackwell Ultra and Rubin platforms, partners with TSMC’s 12nm process for the logic base die of its HBM4 architecture, creating a supply chain where Nvidia’s memory supply depends on the same TSMC capacity that its logic and packaging depend on, concentrating the constraint risk at a single foundry.
The practical consequence for data center operators is a delivery timeline for GB300 Ultra rack deployments that is governed by memory allocation at SK Hynix and Samsung as much as by GPU logic production at TSMC. An operator who has secured a commitment for GB300 Ultra racks in Q3 2026 is holding a delivery commitment that depends on three separate supply chains, each individually constrained, all converging on a single product integration at Nvidia’s assembly partners. Nvidia’s own management has indicated that demand will outrun supply until late 2026, with partners committed to expanding CoWoS lanes and memory suppliers pledging fresh HBM3e capacity, but the ramp timelines remain tight. That characterisation is a statement about a supply constraint that will ease but has not yet eased, and the delivery timelines for the AI infrastructure being planned and financed in mid-2026 reflect that persistent tightness.
The Competitive Dynamic That Blackwell Dominance Creates
Nvidia’s ability to lock over half of TSMC’s CoWoS capacity through 2027 creates a specific competitive dynamic that extends beyond Nvidia’s own market position. The alternative AI accelerator companies that are attempting to compete with Nvidia, AMD, Intel, and the hyperscaler custom silicon programmes, are all competing for access to the same packaging and memory supply that Nvidia has first call on. When AMD needs CoWoS capacity for its MI350 series or Intel needs it for Gaudi 3, they are bidding for the roughly 40 to 50% of capacity that Nvidia has not already reserved. That constraint is structural at the current scale of AI infrastructure deployment and cannot be resolved by AMD or Intel committing more capital to their product roadmaps, because the bottleneck is at TSMC’s packaging lines, not in AMD’s or Intel’s design capabilities.
Why Alternative AI Hardware Still Faces Supply Constraints
The CoWoS constraint also affects the Google-Blackstone TPU cloud venture that launched yesterday, May 19. Google’s TPU hardware uses a different packaging architecture than Nvidia’s CoWoS-based approach, using its own advanced packaging developed in partnership with TSMC through the SoIC stacking technology. The TPU architecture’s different packaging requirements give the Google-Blackstone venture a potential supply chain advantage if CoWoS constraints persist, because the venture’s hardware supply is not directly competing with Nvidia for the same constrained packaging capacity. Whether that packaging architecture advantage translates into a competitive supply chain position depends on whether Google can secure adequate SoIC capacity and HBM supply for its TPU scale targets, which faces its own allocation competition at TSMC and the memory manufacturers.
The supply chain dynamics that govern Blackwell delivery also govern the delivery of every competing AI accelerator architecture, and the operators evaluating alternative silicon commitments need to assess supply chain viability with the same rigour they apply to performance benchmarks — a dynamic we examined in depth in our analysis of why the Google-Blackstone TPU venture is the most direct challenge to Nvidia’s infrastructure dominance yet.
The GB300 Ultra Transition That Adds Complexity
The transition from GB200 to GB300 Ultra, which is underway in 2026, adds a specific layer of complexity to the supply constraint that operators planning AI data center deployments need to incorporate into their infrastructure roadmaps. GB300 Ultra delivers materially better inference performance per rack than GB200 and is already becoming the default specification for new hyperscaler AI compute deployments. Data center racks that once operated at 30 to 40 kilowatts now operate in the hundreds of kilowatts, with designs approaching the megawatt range because tightly coupled Blackwell clusters require synchronised power delivery and cooling. A GB300 Ultra rack operating at 1 megawatt per rack requires substantially different power delivery, cooling, and structural engineering than a GB200 rack operating at 120 kilowatts per rack, forcing facilities built to GB200 specifications to confront design compatibility challenges when customers want to deploy GB300 Ultra.
Hardware Obsolescence Is Accelerating
The transition also affects the secondary market for GB200 hardware. Operators who deployed GB200 racks in 2025 and early 2026 at significant capital cost are watching those assets transition to secondary status faster than their depreciation schedules assumed, creating the same hardware obsolescence dynamic that the H100 to Blackwell transition created for the operators who were earliest to deploy at scale. The private credit funds that financed GB200 deployments on 24-month depreciation assumptions are managing collateral whose commercial premium is eroding at the pace of Nvidia’s hardware roadmap rather than at the pace of their depreciation models— a risk our analysis of the private credit bet on GPU infrastructure examines in full.
The supply chain complexity that has sustained Blackwell constraints through 2026 is the same complexity that will sustain Rubin constraints when Nvidia’s next architecture generation begins ramping in 2026 and 2027. The operators and investors who built their plans on the assumption that Blackwell supply constraints were temporary are discovering that the constraint is structural, not cyclical, because Nvidia’s product roadmap will always be generating demand that exceeds supply capability for the newest and most capable hardware generation.
